The present invention is directed to a method and apparatus for providing effective and inexpensive termination to one or more pins of an electronic device and in particular to a board, for providing termination, which is mountable to a main circuit board.
A number of electronic devices incorporate one or more circuit boards which have multiple-pin units coupled thereto. Recent trends have been toward providing relatively high pin densities such as units with 1100 or more pins within a mounting surface area or xe2x80x9cfootprintxe2x80x9d as small as 1600 mm2. In many electronic devices, particularly digital devices, at least some of the pins are xe2x80x9cterminatedxe2x80x9d, i.e., coupled to a termination resistance. Termination can assist in providing a well-defined environment within which digital signals can travel, so that signal levels will correspond to established values of xe2x80x9chighxe2x80x9d and xe2x80x9clowxe2x80x9d. Termination of a given signal can be used to absorb energy of an incoming signal. Receiver circuitry typically senses the voltage on the terminating resistor.
A number of types of components fall in this category, including, for example, application specific integrated circuits (ASICs). ASICs and similar components can be mounted to a circuit board, providing desired electronic connections, in any of a number of fashions. One fashion of making such couplings is providing an ASIC (or similar component) with a pattern of solder balls (a xe2x80x9cball grid arrayxe2x80x9d) such that the (relatively dense) pins of the ASIC or similar device can be readily coupled to an array of printed circuit pads or other components on the circuit board, e.g., using a single heating step.
In many situations, it can be infeasible to provide terminations for pins within the footprint of the component, especially for high-pin density devices. Accordingly, previous devices have typically provided short (e.g., printed circuit) conductive leads or xe2x80x9cstubsxe2x80x9d leading away from pin pad locations within the footprint, to another region of the board where a termination resistor can be placed. Terminating resistors can include surface mount resistors (typically provided using a xe2x80x9cpick and placexe2x80x9d procedure) and/or buried resistors (at least partially formed as an interior region or layer of the circuit board).
There are a number of undesirable effects associated with previous approaches. In general, it would be more advantageous to place termination resistors as close to the respective pins as possible. For example, the leads or stubs can create an amount of parasitic inductance. Termination resistors which are significantly spaced from a corresponding pin can result in distorting signals by creating reflections. Short leads or stubs can effectively act as small antenna, creating distortions and/or undesirable electromagnetic interference (EMI). These and other undesirable effects are especially aggravated in devices or components with high (clock) frequencies, of the type becoming increasing common, such as frequencies of one gigahertz or more. As a result, prior approaches, including as described above, while they might have been suitable for earlier, lower frequency, lower pin-density devices, are becoming increasingly unacceptable in the context of modem high frequency electronic devices.
Accordingly, it would be useful to provide a system, method and apparatus for terminating desired pins of an ASIC or similar board-mounted device which can reduce or eliminate undesirable features of prior approaches, including as described above (such as undesirable signal distortion, reflectance, EMI and the like), especially in the context of high frequency electronic devices and/or high pin-density components.
Another disadvantage associated with the previous approaches has been the cost for implementing such approaches. The approach of placing termination resistances outside the footprint of an ASIC (or similar device) requires an undesirably large expenditure in pick and place procedures (e.g. in the case of surface mount resistors). When buried resistances are used, the cost of fabricating the circuit board can be relatively high including the cost of fabricating a circuit board having multiple layers (even though, for termination purposes, additional layers may be needed, only over a small region of the main circuit board) approaches which involve positioning termination resistance outside the footprint of the ASIC (or similar component) consumes some of the region or surface area of the circuit board, which can ultimately add to the cost of the electronic device.
In general, if an electronic device is being redesigned or modified to use a different ASIC, (e.g., having different pin positions requiring termination), previous approaches would require redesigning the main circuit board (even in situations where these are substantially the only changes being made). This approach, in addition to adding to the average design costs for a line of electronic devices, also creates other costs, such as costs of fabricating, warehousing, distributing and tracking multiple different main circuit boards, to accommodate different ASICs, costs of training personnel in analyzing or maintaining multiple different versions of the main circuit board and the like.
Accordingly, it would be useful to provide a system, method and apparatus which can be readily configured to provide desired terminations for component pins, while reducing costs associated with previous approaches.
The present invention includes a recognition of the existence, source and/or nature of problems in previous approaches, including as described herein.
In one aspect, the present invention involves positioning a second, preferably smaller, circuit board (xe2x80x9ctermination boardxe2x80x9d) which can include or accommodate termination resistances (e.g., surface mount resistors, printed resistors or buried resistors), mounted on the circuit board which contains the ASIC (xe2x80x9cthe mainxe2x80x9d circuit board), with the ASIC (or similar component) and termination board being positioned on opposite sides of the main circuit board. The termination board is preferably fully or partially aligned with, overlapping with, or substantially in the vicinity of the ASIC footprint. In one embodiment, both the ASIC and the termination board are ball grid array devices (BGA). Through-holes or xe2x80x9cviasxe2x80x9d in the main circuit board provide a conductive signal pathway from at least some ASIC pins, through the main circuit board, to pads, vias and the like, of the termination board, and preferably the termination board ball grid array at least partially corresponds to the positions of the vias. In this way, the termination resistance is provided in, or on, the termination board. Resistances can be positioned substantially within the footprint of the ASIC, preferably substantially aligned with a corresponding ASIC pin and spaced about the combined thickness of the main circuit board and the thickness of the termination board, from the corresponding pin of the ASIC. This approach can be used to eliminate some or all stubs and/or reduce the number and/or length of stubs. As a result, the amount of signal distortion, reflections, and/or EMI can be reduced, which can be of particular benefit in the context of high frequency devices.
By providing some or all termination resistances within the footprint of the ASIC, a number of costs savings are possible. Surface area within the ASIC footprint can be put to use reducing or eliminating the amount of main circuit board non-footprint area consumed by termination resistors. In at least some circumstances, use of a new or modified ASIC, or other circuit modifications can be accommodated by designing and using a new termination board, thus reducing or eliminating the amount of redesign needed on the main circuit board. Economies of scale associated with placing surface mount resistors (if used) on (relatively small) termination boards can reduce pick and place costs associated with the main circuit board and/or the electronic device as a whole.
In some aspects, the termination board may be configured such that it does not cover the entire footprint of the ASIC. For example, in some situations those ASIC pins which require termination (or which will be terminated by a connection with the termination board) are positioned in only a portion of the full ASIC footprint, and thus the termination board, in this embodiment, may cover only that portion of the ASIC footprint. In some embodiments, the termination board may have at least a portion which is positioned outside the ASIC footprint, e.g., to provide communications between external signals (external to the ASIC) and the termination BGA, or one or more ASIC pins.
In one aspect terminating resistances are provided to at least some pins of an ASIC or other multi-pin component mounted on a surface of a circuit board, by positioning a second circuit board on the surface of the main circuit board substantially opposite, and preferably aligned with or overlapping, the multi-pin component. The second circuit board accommodates a resistor such as a printed resistor, surface mount resistor or buried resistor. Preferably, vias in the main circuit board connect pins of the ASIC to terminating resistors. Preferably one or both of the ASIC and the second circuit board are coupled to the main circuit board by a ball grid array.